Mixed substrates today are of increasing interest.
By alternating bulk areas and insulating areas that may have variable insulator thicknesses, within the same substrate, different components may be made on the same and single substrate plate, such as, for example:                on bulk areas: components having an electric connection between the front and rear faces of the substrate, for example, so-called “vertical” components,        on areas of the “SeOI” (“Semiconductor-On-Insulator”) type or further of the “SOI” (“Silicon-On-Insulator”) type, components totally isolated from each other and isolated from their substrate, for example, components of the “MOS” type or systems of the “MEMS” or “MOEMS” type,        and on SeOI areas having a very thin insulator layer, with a thickness of less than 10 nm, other types of logic MOS components, which have, under the insulator layer, a ground plane or a rear gate, for example.        
The acronym “MOS” corresponds to “Metal-Oxide Semiconductor.” The acronyms “MEMS” and “MOEMS,” respectively, correspond to “Micro-Electro-Mechanical Systems,” and “Micro-Opto-Electro-Mechanical Systems.”
Many techniques manufacturing mixed substrates already exist.
Among the latter, mention may be made of the technique of total or partial selective (i.e., localized) dissolution of the oxide of a semiconductor-on-insulator (SeOI) type structure. Such a structure successively comprises from its base toward its surface: a supporting substrate in a semiconducting material, an oxide layer and a thin semiconducting layer.
This selective dissolution method is described briefly below. It comprises the following steps:                (a) forming a mask on the thin semiconducting layer, so as to define at the surface of the latter, so-called “exposed” areas, not covered by the mask, distributed according to a desired pattern,        (b) applying a heat treatment in a controlled reducing or neutral atmosphere, and under controlled temperature and duration conditions, so as to incite the oxygen present in the oxide layer of the exposed areas to diffuse through the thin semiconducting layer, leading to partial or total disappearance of the oxide buried in these areas, according to the desired pattern.        
FIG. 1 is a diagram illustrating an exemplary mixed substrate thereby obtained, after selective and total dissolution of the oxide and before removal of the mask having allowed this localized dissolution.
In FIG. 1, an SeOI substrate 1 may be seen comprising a supporting substrate 11 in a semiconducting material, an oxide layer 12 and a thin semiconducting layer 13. A mask bears reference M.
Taking into account the shape of the mask M, after dissolution, a mixed substrate should be theoretically obtained, comprising a bulk area referenced as 10 and an SeOI area referenced as 100 with the pattern of the SeOI area 100 essentially corresponding to the pattern of the mask M.
Now, in practice, between the actually obtained bulk area 10′ and the SeOI area 100, a transition area 120 much more extended than as expected is observed, in which the oxide is only partly dissolved. This transition area 120 results from the fact that at a vertical edge of the mask M, extending in the vicinity of the exposed area of the SeOI substrate 1, dissolution of the oxide layer 12 is less well carried out.
In the case (not shown) when dissolution of the oxide is only partial, a transition area is also observed between the SeOI area and the area where the oxide has been partly dissolved.
Moreover, in the surface layer 13, located in the vicinity of this transition area, the presence of crystalline defects such as dislocations is noticed. These defects are related to the required crystalline rearrangement induced by the deformations of the layers, for example, by the collapse of the exposed thin layer 13, or further by the realignment of crystalline lattices of the surface layer and of the underlying substrate in the case when the buried oxide layer is entirely dissolved. The collapsed portion of the layer 13 bears reference 14 (see FIG. 1).